Manufacturer Part |
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IC SDRAM |
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Mobile |
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Datasheet |
Details
Features |
Image FEATURES Power Supply: Vdd,Vddq=1.8V 0.1V Double Data Rate architecture: two data transfers per clock cycle CAS Latency:3,4,5,6 and 7 Burst Length: 4 and 8 Bi-directional,differential data strobes (DQS and DQS)are transmitted / received with data Edge-aligned with Read data and center-aligned with wirte data DLL aligns DQ and DQS transitions with clock Applications Mobile |
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