Manufacturer Part |
|
Product Category |
QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS |
Application |
Base-Station IF Receivers |
Datasheet |
Details
Description |
Image Maximum Sample Rate: 125 MSPS 14-Bit Resolution with No Missing Codes Simultaneous Sample and Hold 3.5dB Coarse Gain and up to 6dB Programmable Fine Gain for SFDR/SNR Trade-Off Serialized LVDS Outputs with Programmable Internal Termination Option Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude down to 400 mVPP Internal Reference with External Reference Support No External Decoupling Required for References 3.3-V Analog and Digital Supply 64 QFN Package (9 mm × 9 mm) |
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