CY2308 CY2308SXC-2T Clock Buffer 3.3V Zero Delay Buffer

Features

Image

Description

Zero input-output propagation delay, adjustable by capacitive

load on FBK input

Multiple configurations, see Available CY2308 Configurations

on page 4 for more details

Multiple low skew outputs

Two banks of four outputs, three-stateable by two select inputs

10 MHz to 133 MHz operating range

75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz)

Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP

3.3 V operation

Industrial temperature available