The official website - Shenzhen Mingjiada Electronic Co., LTD
The AD9250BCPZ-250 device is a dual-channel 14-bit ADC launched by Analog Devices (ADI), with a maximum sampling rate of 250 MSPS. It is designed to provide solutions for low-cost, small-sized, wide-bandwidth, and multi-functional communication applications. The following are its technical parameters:
Number of digits: 14
Sampling rate (per second) : 250M
Input number: 2
Input type: Difference
Data interface: JESD204B
Configuration: S/H-ADC
Ratio - S/H:ADC: 1:1
A/D converter number: 2
Architecture: Pipeline
Reference type: Internal
Voltage - Power supply, analog: 1.7V to 1.9V
Voltage - power supply, number: 1.7V to 1.9V
Feature: Synchronous sampling
Operating temperature: -40°C to 85°C
Packaging/Housing: 48-LFCSP
Introduction
The AD9250BCPZ-250 is a dual-channel 14-bit ADC with a maximum sampling rate of 250 MSPS, designed to provide solutions for low-cost, small-sized, wide-bandwidth, and multi-functional communication applications.
The core of AD9250BCPZ-250 adopts a multi-level, differential pipeline architecture and integrates output error correction logic. The ADC core features a wide bandwidth input and supports various input ranges selectable by users. Integrated reference voltage sources can simplify the design. Duty cycle stabilizers can be used to compensate for the fluctuations in the duty cycle of the ADC clock, enabling the converter to maintain excellent performance. The JESD204B high-speed serial interface can reduce the wiring requirements of circuit boards and decrease the number of pins needed for receiving devices.
By default, the output data of AD9250BCPZ-250 is directly routed to two JESD204B serial output channels, which are set to CML level. The four modes support any combination of M = 1 or 2 (single-channel or dual-channel converter) and L = 1 or 2 (single-channel or dual-channel). In dual-channel ADC mode, data can be sent through two channels at a maximum sampling rate of 250 MSPS. However, if data is sent through a single channel, only a maximum sampling rate of 125 MSPS is supported. The device provides synchronous inputs (SYNCINB± and SYSREF±).
When necessary, the flexible shutdown option of the AD9250BCPZ-250 can significantly reduce power consumption. Each channel supports programmable out-of-range level detection through a dedicated fast detection pin. Settings and control programming are accomplished using a three-wire SPI-compatible serial interface.
The AD9250BCPZ-250 is packaged in a 48-pin LFCSP package and has a rated temperature range of -40 °C to +85°C in the industrial temperature range.
Application field
Diversity radio system
• Multi-mode digital receiver (3G
TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE
• HFC digital reverse path receiver
• I/Q demodulation system
• Intelligent antenna system
Electronic test and measurement equipment
Radar receiver
• COMSEC radio architecture
• IED detection/interference system
• General software-defined radio
• Broadband data application
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